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Menu
  • Who we are
    • Our History
    • Quality & Accreditations
    • Our Environmental Policies
      • Our WEEE Policy
    • Careers
  • What we offer
    • By application
      • Semiconductors
      • Geological Sciences
      • Optoelectronics
      • Optics
      • Other applications
    • By material
      • Silicon
      • Silicon Carbide
      • Sapphire
      • Gallium Arsenide
      • Cadmium Zinc Telluride
      • Indium Phosphide
      • Rock/Soil
      • Other Materials
  • Products & Solutions
    • Lapping & Polishing
    • Chemical Polishing & Chemical Mechanical Polishing
    • Driven Head Lapping & Polishing Tools
    • Bonding & Impregnation Units
    • Test & Measurement
    • Cutting & Sawing
    • Accessories
    • Consumable Items
    • Consumables Store
  • Knowledge base
    • Whitepapers
    • Tech Files – Blog
    • Technology Transfer Programme
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Tech Files

The Value of Wafer Bonding

Posted in Tech Files

22nd July 2015

If controlling Total Thickness Variation (TTV) is critical to your wafer thinning or polishing process; then it is imperative that the wafer be bonded to a support carrier disc (substrate) to control bond thickness consistency and dimensional accuracy.

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Automated dynamic lapping for the ultimate substrate finish

Posted in Tech Files

20th July 2015

As a result of the extensive and demanding applications for GaAs wafers, there are strict industry requirements for flatness, which typically needs to be within ±2 μm. Another vital parameter that must be controlled is TTV (total thickness variation) – the difference between the maximum and …

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Automating the challenge of processing fragile wafers

Posted in Tech Files

14th July 2015

Gallium arsenide (GaAs) has become the substrate material of choice for many electronic devices used in high frequency and optoelectronic applications. However, the processing of GaAs wafers is more difficult than many other substrate materials as it is softer and more fragile. When processing GaAs wafers, …

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Answering the need for automated plate flatness control

Posted in Tech Files

14th July 2015

During the lapping and polishing of fragile wafers such as those composed of gallium arsenide (GaAs), precisely monitoring and controlling the flatness of the lapping plate is crucial throughout the entire process. Any flatness error in the lapping plate will be reflected in the sample being …

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How to soften the challenge of finishing silicon carbide

Posted in Tech Files

29th April 2015

Silicon Carbide (SiC or carborundum) has become the material of choice in applications ranging from fibre optics and LEDs to power electronics. Devices based upon SiC can operate at a higher temperature, power level and voltage than other materials. This in turn enables improved energy efficiency …

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How to put a sparkle into lapping and polishing sapphire wafers

Posted in Tech Files

28th April 2015

Sapphire substrates are becoming widely used to grow III-V and II-VI compounds such as GaN for LEDs (light-emitting diodes). These are contributing to significant cost and energy savings, meaning that the volume of sapphire wafers being produced has increased dramatically in recent years. Synthetic sapphire has …

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Preston’s Law rules – predicting lapping and polishing performance

Posted in Tech Files

24th March 2015

Preston's Law enables the prediction of lapping and polishing rates and using it to model system performance can help improve processing efficiency and performance. During the manufacture of semiconductor wafers, a number of physical processing steps are typically undertaken. After slicing the wafer from the crystal …

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Finishing first – automating wafer lapping and polishing

Posted in Tech Files

24th March 2015

While lapping and polishing processes have become more predictable, there is often significant variation in the results obtained by different operators. Automated systems can remove this variability and help increase productivity, read on to learn more. Semiconductor wafers are expensive, with custom wafers often costing in …

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